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? 2003 microchip technology inc. ds21714c-page 1 m mcp6546/7/8/9 features ? low quiescent current: 600 na/comparator (typ.) ? rail-to-rail input: v ss - 0.3v to v dd + 0.3v ? open-drain output: v out 10v ? propagation delay 4 s (typ.) ? wide supply voltage range: 1.6v to 5.5v ? single available in sot-23-5, sc-70-5 packages ? available in single, dual and quad ? chip select (cs ) with mcp6548 ? low switching current ? internal hysteresis: 3.3 mv (typ.) ? industrial temperature: -40c to +85c typical applications ? laptop computers ? mobile phones ? metering systems ? hand-held electronics ? rc timers ? alarm and monitoring circuits ? windowed comparators ? multi-vibrators related devices ? cmos/ttl-compatible output: mcp6541/2/3/4 description the microchip technology inc. mcp6546/7/8/9 family of comparators is offered in single (mcp6546), single with chip select (mcp6548), dual (mcp6547) and quad (MCP6549) configurations. the outputs are open-drain and are capable of driving heavy dc or capacitive loads. these comparators are optimized for low power, single-supply application with greater than rail-to-rail input operation. the output limits supply current surges and dynamic power consumption while switching. the open-drain output of the mcp6546/7/8/9 family can be used as a level-shifter for up to 10v using a pull-up resistor. it can also be used as a wired-or logic. the internal input hysteresis eliminates output switching due to internal noise voltage, reducing current draw. these comparators operate with a single-supply voltage as low as 1.6v and draw less than 1 a/ comparator of quiescent current. the related mcp6541/2/3/4 family of comparators from microchip has a push-pull output that supports rail-to- rail output swing and interfaces with cmos/ttl logic. package types v in + v in ? mcp6546 v ss v dd out 1 2 3 4 8 7 6 5 - + nc nc nc pdip, soic, msop 4 1 2 3 - + 5 sot-23-5 v dd out v in + v ss v in ? mcp6546-r mcp6547 v ina + v ina ? v ss 1 2 3 4 8 7 6 5 - outa + - + v dd outb v inb ? v inb + v in + v in ? mcp6548 v ss v dd out 1 2 3 4 8 7 6 5 - + nc cs nc pdip, soic, msop pdip, soic, msop MCP6549 v ina + v ina ? v ss 1 2 3 4 14 13 12 11 - outa + - + v dd outd v ind ? v ind + 10 9 8 5 6 7 outb v inb ? v inb +v inc + v inc ? outc + - - + pdip, soic, tssop 4 1 2 3 - + 5 sot-23-5, sc-70-5 v ss out v in + v dd v in ? mcp6546 open-drain output sub-microamp comparators
mcp6546/7/8/9 ds21714c-page 2 ? 2003 microchip technology inc. 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd - v ss ..............................................................7.0v open-drain output..................................... v ss +10.5v all inputs and outputs ........... v ss ?0.3v to v dd +0.3v difference input voltage ............................ |v dd - v ss | output short-circuit current .......................continuous current at input pins .........................................2 ma current at output and supply pins .................. 30 ma storage temperature .......................... -65c to +150c maximum junction temperature (t j ) ............... +150c esd protection on all pins (hbm;mm)..........4 kv;200v ? notice: stresses above those listed under ?maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. expo- sure to maximum rating conditions for extended periods may affect device reliability. pin function table dc characteristics name function v in +, v ina +, v inb +, v inc +, v ind + non-inverting inputs v in ?, v ina ?, v inb ?, v inc ?, v ind ? inverting inputs v dd positive power supply v ss negative power supply out, outa, outb, outc, outd outputs cs chip select nc not connected electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = 25c, v in + = v dd /2, v in ? = v ss , r pu =2.74k ? to v pu = v dd (refer to figure 1-3). parameters sym min typ max units conditions power supply supply voltage v dd 1.6 ? 5.5 v quiescent current per comparator i q 0.3 0.6 1 a i out = 0 input input voltage range v cmr v ss ? 0.3 ? v dd + 0.3 v common mode rejection ratio cmrr 55 70 ? db v dd = 5v, v cm = -0.3v to 5.3v common mode rejection ratio cmrr 50 65 ? db v dd = 5v, v cm = 2.5v to 5.3v common mode rejection ratio cmrr 55 70 ? db v dd = 5v, v cm = -0.3v to 2.5v power supply rejection ratio psrr 63 80 ? db v cm = v ss input offset voltage v os -7.0 1.5 +7.0 mv v cm = v ss (note 1) drift with temperature ? v os / ? t a ? 3 ? v/c t a = -40c to +85c, v cm = v ss input hysteresis voltage v hyst 1.5 3.3 6.5 mv v cm = v ss (note 1) drift with temperature ? v hyst / ? t a ? 10 ?v/ct a = -40c to +25c, v cm = v ss drift with temperature ? v hyst / ? t a ? 5 ?v/ct a = +25c to +85c, v cm = v ss input bias current i b ?1 ?pav cm = v ss over temperature i b ??100pat a = -40c to +85c, v cm = v ss (note 3) input offset current i os ? 1 ? pa v cm = v ss common mode input impedance z cm ?10 13 ||4 ? ? ||pf differential input impedance z diff ?10 13 ||2 ? ? ||pf open-drain output output pull-up voltage v pu v dd ?10v( note 2 ) high-level output current i oh -100 ? ? na v dd = 1.6v to 5.5v, v pu = 10v (note 2) low-level output voltage v ol v ss ?v ss + 0.2 v i out = 2 ma, v pu = v dd = 5v short-circuit current i sc ?50 ?mav pu = v dd = 5.0v (note 2) output pin capacitance c out ?8 ?pf note 1: the input offset voltage is the center of the input-referred trip points. the input hysteresis is the difference between the input-referred trip points. 2: do not short the output above v ss + 10v. limit the output current to absolute maximum rating of 30 ma. the comparator does not function properly when v pu < v dd . 3: input bias current overtemperature is not tested for the sc-70-5 package.
? 2003 microchip technology inc. ds21714c-page 3 mcp6546/7/8/9 ac characteristics specifications for mcp6548 chip select figure 1-1: timing diagram for the cs pin on the mcp6548. figure 1-2: propagation delay timing diagram. electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = 25c, v in + = v dd /2, step = 200 mv, overdrive = 100 mv, r pu =2.74k ? to v pu = v dd , and c l = 36 pf (refer to figure 1-2 and figure 1-3). parameters sym min typ max units conditions fall time t f ?0.7?s (note 1) propagation delay (high-to-low) t phl ?4.08.0s propagation delay (low-to-high) t plh ?3.08.0s (note 1) propagation delay skew t pds ?-1.0? s (notes 1 and 2) maximum toggle frequency f max ? 225 ? khz v dd = 1.6v f max ? 165 ? khz v dd = 5.5v input noise voltage e n ? 200 ? v p-p 10 hz to 100 khz note 1: t r and t plh depend on the load (r l and c l ); these specifications are valid for the indicated load only. 2: propagation delay skew is defined as: t pds = t plh - t phl . electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = 25c, v in + = v dd /2, v in ? = v ss , r pu =2.74k ? to v pu = v dd , and c l = 36 pf (refer to figures 1-1 and 1-3). parameters sym min typ max units conditions cs low specifications cs logic threshold, low v il v ss ?0.2v dd v cs input current, low i csl ?5?pacs = v ss cs high specifications cs logic threshold, high v ih 0.8v dd ?v dd v cs input current, high i csh ?1?pacs = v dd cs input high, v dd current i dd ?18?pacs = v dd cs input high, gnd current i ss ?-20?pacs = v dd comparator output leakage i o(leak) ?1?pav out = v ss +10v cs dynamic specifications cs low to comparator output low turn-on time t on ?250mscs = 0.2v dd to v out = v dd /2, v in ? = v dd cs high to comparator output high z turn-off time t off ?10?scs = 0.8v dd to v out = v dd /2, v in ? = v dd cs hysteresis v cs_hyst ?0.6? vv dd = 5v v il hi-z t on v ih cs t off v out -20 pa, typ. hi-z i ss i cs 1pa, typ. 1pa, typ. -20 pa, typ. -0.6 a, typ. v ol t plh v out v in ? 100 mv 100 mv t phl v ol v in + = v dd /2 v oh
mcp6546/7/8/9 ds21714c-page 4 ? 2003 microchip technology inc. temperature specifications 1.2 test circuit configuration this test circuit configuration is used to determine the ac and dc specifications. figure 1-3: ac and dc test circuit for the open- drain output comparators. electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v and v ss = gnd. parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 ? +85 c operating temperature range t a -40 ? +125 c note storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sc-70 ja ?331?c/w thermal resistance, 5l-sot-23 ja ?256?c/w thermal resistance, 8l-pdip ja ?85?c/w thermal resistance, 8l-soic ja ?163?c/w thermal resistance, 8l-msop ja ?206?c/w thermal resistance, 14l-pdip ja ?70?c/w thermal resistance, 14l-soic ja ?120?c/w thermal resistance, 14l-tssop ja ?100?c/w note: the mcp6546/7/8/9 operates over this extended temperature range, but with reduced performance. in any case, the junction temperature (t j ) must not exceed the absolute maximum specification of +150c. v dd v ss = 0v 200 k ? 200 k ? 2.74 k ? 100 k ? v out v in = v ss 36 pf mcp654x r pu v pu = v dd
? 2003 microchip technology inc. ds21714c-page 5 mcp6546/7/8/9 2.0 typical performance curves note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-1: input offset voltage histogram at v cm =v ss . figure 2-2: input offset voltage drift histogram at v cm =v ss . figure 2-3: input offset voltage vs. ambient temperature at v cm =v ss . figure 2-4: input hysteresis voltage histogram at v cm =v ss . figure 2-5: input hysteresis voltage drift histogram. figure 2-6: input hysteresis voltage vs. ambient temperature at v cm =v ss . note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 input offset voltage (mv) percentage of occurrences 1200 samples v cm = v ss 0% 2% 4% 6% 8% 10% 12% 14% 16% -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 input offset voltage drift (v/c) percentage of occurrences 1200 samples v cm = v ss -500 -400 -300 -200 -100 0 100 200 300 400 500 -40-20 0 20406080 ambient temperature (c) input offset voltage (v) v dd = 1.6v v dd = 5.5v v cm = v ss 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 input hysteresis voltage (mv) percentage of occurrences 1200 samples v cm = v ss 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% 22% 24% 26% 2345678910111213141516 input hysteresis voltage drift (v/c) percentage of occurrences 1200 samples v cm = v ss t a = -40c to 25c t a = 25c to 85c 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40-20 0 20406080 ambient temperature (c) input hysteresis voltage (mv) v dd = 1.6v v dd = 5.5v v cm = v ss
mcp6546/7/8/9 ds21714c-page 6 ? 2003 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-7: input offset voltage vs. common mode input voltage at v dd = 1.6v. figure 2-8: input offset voltage vs. common mode input voltage at v dd =5.5v. figure 2-9: cmrr, psrr vs. ambient temperature at v cm = v ss . figure 2-10: input hysteresis voltage vs. common mode input voltage at v dd =1.6v. figure 2-11: input hysteresis voltage vs. common mode input voltage at v dd =5.5v. figure 2-12: input bias current, input offset current vs. common mode input voltage at +85c. -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) input offset voltage (mv) v dd = 1.6v t a = 85c t a = 25c t a = -40c -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input offset voltage (mv) v dd = 5.5v t a = 85c t a = 25c t a = -40c 55 60 65 70 75 80 85 90 -40-20 0 20406080 ambient temperature (c) cmrr, psrr; input referred (db) psrr, v in+ = v ss , v dd = 1.6v to 5.5v cmrr, v in + = 2.5v to 5.3v, v dd = 5.0v cmrr, v in + = -0.3v to 2.5v, v dd = 5.0v cmrr, v in + = -0.3v to 5.3v, v dd = 5.0v 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) input hysteresis voltage (mv) t a = -40c v dd = 1.6v t a = 85c t a = 25c 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input hysteresis voltage (mv) v dd = 5.5v t a = 85c t a = -40c t a = 25c 0 2 4 6 8 10 12 14 16 18 20 22 24 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common mode input voltage (v) input current (pa) t a = 85c v dd = 5.5v input bias current input offset current
? 2003 microchip technology inc. ds21714c-page 7 mcp6546/7/8/9 note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-13: input bias current, input offset current vs. ambient temperature. figure 2-14: quiescent current vs. ambient temperature vs. power supply voltage. figure 2-15: quiescent current vs. common mode input voltage at v dd = 1.6v. figure 2-16: quiescent current vs. power supply voltage. figure 2-17: quiescent current vs. common mode input voltage at v dd = 5v. figure 2-18: output short-circuit current vs. power supply voltage. -2 0 2 4 6 8 10 12 14 16 18 20 22 25 35 45 55 65 75 85 ambient temperature (c) input current (pa) input bias current input offset current v dd = 5.5v v cm = v dd 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -40-20 0 20406080 ambient temperature (c) quiescent current (a/comparator) v dd = 5.5 v v dd = 1.6 v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) quiescent current (a/comparator) v dd = 1.6v i q does not include pull-up resistor current sweep v in +, v in ? = v dd /2 sweep v in ?, v in + = v dd /2 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) quiescent current (a/comparator) t a = -40c t a = +85c t a = +25c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) quiescent current (a/comparator) v dd = 5.5v i q does not include pull-up resistor current sweep v in +, v in ? = v dd /2 sweep v in ?, v in + = v dd /2 0 5 10 15 20 25 30 35 40 45 50 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) output short circuit current (ma) -i osc , t a = -40c -i osc , t a = +85c -i osc , t a = +25c
mcp6546/7/8/9 ds21714c-page 8 ? 2003 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-19: output voltage headroom vs. output current at v dd =1.6v. figure 2-20: high-to-low propagation delay histogram. figure 2-21: propagation delay skew histogram. figure 2-22: output voltage headroom vs. output current at v dd =5.5v. figure 2-23: low-to-high propagation delay histogram. figure 2-24: propagation delay vs. ambient temperature. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 output current (ma) output voltage headroom (v) v dd = 1.6v v ol -v ss , t a = -40c v ol -v ss , t a = +25c v ol -v ss , t a = +85c 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 50% 012345678 high-to-low propagation delay (s) percentage of occurrences 408 samples 100 mv overdrive v cm = v dd /2 v dd = 1.6v v dd = 5.5v 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 50% -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 propagation delay skew (s) percentage of occurrences 408 samples 100 mv overdrive v cm = v dd /2 v dd = 1.6v v dd = 5.5v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0246810121416182022 output current (ma) output voltage headroom (v) v dd = 5.5v v ol -v ss , t a = -40c v ol -v ss , t a = 85c v ol -v ss , t a = 25c 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 50% 55% 60% 65% 012345678 low-to-high propagation delay (s) percentage of occurrences 408 samples 100 mv overdrive v cm = v dd /2 v dd = 5.5v v dd = 1.6v 0 1 2 3 4 5 6 7 8 -40-200 20406080 ambient temperature (c) propagation delay (s) 100 mv overdrive v cm = v dd /2 t plh @ v dd = 1.6v t phl @ v dd = 1.6v t plh @ v dd = 5.5v t phl @ v dd = 5.5v
? 2003 microchip technology inc. ds21714c-page 9 mcp6546/7/8/9 note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-25: propagation delay vs. power supply voltage. figure 2-26: propagation delay vs. common mode input voltage at v dd = 1.6v. figure 2-27: propagation delay vs. load capacitance. figure 2-28: propagation delay vs. input overdrive. figure 2-29: propagation delay vs. common mode input voltage at v dd = 5.5v. figure 2-30: supply current vs. toggle frequency. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) propagation delay (s) v cm = v dd /2 t plh @ 100 mv overdrive t plh @ 10 mv overdrive t phl @ 10 mv overdrive t plh @ 100 mv overdrive 0 1 2 3 4 5 6 7 8 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) propagation delay (s) v dd = 1.6v 100 mv overdrive t phl t plh 0 20 40 60 80 100 120 140 160 180 200 0 102030405060708090 load capacitance (nf) propagation delay (s) 100 mv overdrive v cm = v dd /2 t plh @ v dd = 5.5v t plh @ v dd = 1.6v t phl @ v dd = 1.6v t phl @ v dd = 5.5v 1 10 100 1 10 100 1000 input overdrive (mv) propagation delay (s) v cm = v dd /2 t plh @ v dd = 1.6v t phl @ v dd = 5.5v t phl @ v dd = 1.6v t plh @ v dd = 5.5v 0 1 2 3 4 5 6 7 8 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) propagation delay (s) v dd = 5.5v 100 mv overdrive t plh t phl 0.1 1 10 0.1 1 10 100 toggle frequency (khz) supply current (a/comparator) v dd = 5.5 v v dd = 1.6 v 100 mv overdrive v cm = v dd /2 i dd does not include pull-up resistor current
mcp6546/7/8/9 ds21714c-page 10 ? 2003 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-31: propagation delay vs. pull- up resistor. figure 2-32: supply current (shoot through current) vs. chip select (cs ) voltage at v dd = 1.6v (mcp6548 only). figure 2-33: supply current (charging current) vs. chip select (cs ) pulse at v dd = 1.6v (mcp6548 only). figure 2-34: chip select (cs ) step response (mcp6548 only). figure 2-35: supply current (shoot through current) vs. chip select (cs ) voltage at v dd = 5.5v (mcp6548 only). figure 2-36: supply current (charging current) vs. chip select (cs ) pulse at v dd = 5.5v (mcp6548 only). 0 1 2 3 4 5 6 7 8 0 102030405060708090100 pull-up resistor, r pu (k ) propagation delay (s) v in ? = 100 mv overdrive v cm =v dd /2 v in +=v cm t phl @v dd =1.6v t phl @v dd =5.5v t plh @v dd =5.5v t plh @v dd =1.6v 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 chip select (cs) voltage (v) supply current (a/comparator) comparator shuts off here comparator turns on here v dd = 1.6v cs hysteresis cs high-to-low cs low-to-high 100 10p 100p 1n 10n 100n 1 10 0 5 10 15 20 25 30 35 0123456789101112 time (1 ms/div) -9.8 -8.2 -6.6 -4.9 -3.3 -1.6 0.0 1.6 output voltage, cs voltage (v) v out i dd cs start-up i dd v dd = 1.6v supply current (a/comparator) -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 012345678910 time (ms) chip select, output voltage (v) v out cs v dd = 5.5v 1. e-1 1 1. e-1 0 1. e-0 9 1. e-0 8 1. e-0 7 1. e-0 6 1. e-0 5 1. e-0 4 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 chip select (cs) voltage (v) supply current (a/comparator) comparator shuts-off comparator turns-on v dd = 5.5v 100 1 10 100n 1n 10n 100p 10p cs high-to-low cs low-to-high cs hysteresis 0 50 100 150 200 250 300 350 0123456789101112 time (1 ms/div) -33.0 -27.5 -22.0 -16.5 -11.0 -5.5 0.0 5.5 output voltage, cs voltage (v) v out i dd cs start-up i dd v dd = 5.5v charging output capacitance supply current (a/comparator)
? 2003 microchip technology inc. ds21714c-page 11 mcp6546/7/8/9 note: unless otherwise indicated, v dd = +1.6v to +5.0v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r pu = 2.74 k ? to v pu =v dd , and c l = 36 pf. figure 2-37: the mcp6546/7/8/9 comparators show no phase reversal. figure 2-38: output leakage current (cs =v dd ) vs. output voltage (mcp6548 only) -1 0 1 2 3 4 5 6 7 012345678910 time (1 ms/div) inverting input, output voltage (v) v out v in ? v dd = 5.5v 0 50 100 150 200 250 300 350 400 450 500 012345678910 output voltage (v) output leakage current (pa) v dd = 1.6v v dd = 5.5v t a = +85c cs = v dd v in + = v dd /2 v in ? = v ss
mcp6546/7/8/9 ds21714c-page 12 ? 2003 microchip technology inc. 3.0 applications information the mcp6546/7/8/9 family of push-pull output comparators are fabricated on microchip?s state-of-the- art cmos process. they are suitable for a wide range of applications requiring very low power consumption. 3.1 comparator inputs the mcp6546/7/8/9 comparator family uses cmos transistors at the input. they are designed to prevent phase inversion when the input pins exceed the supply voltages. figure 2-37 shows an input voltage exceeding both supplies with no resulting phase inversion. the input stage of this family of devices uses two differential input stages in parallel: one operates at low input voltages and the other at high input voltages. with this topology, the input voltage is 0.3v above v dd and 0.3v below v ss . therefore, the input offset voltage is measured at both v ss - 0.3v and v dd + 0.3v to ensure proper operation. the maximum operating input voltages that can be applied are v ss - 0.3v and v dd + 0.3v. voltages on the inputs that exceed this absolute maximum rating can cause excessive current to flow and permanently damage the device. in applications where the input pin exceeds the specified range, external resistors can be used to limit the current below 2 ma, as shown in figure 3-1. figure 3-1: an input resistor (r in ) should be used to limit excessive input current if either of the inputs exceeds the absolute maximum specification. 3.2 open-drain output the open-drain output is designed to make level- shifting and wired-or logic easy to implement. the output can go as high as 10v for 9v battery-powered applications. the output stage minimizes switching current (shoot-through current from supply-to-supply) when the output changes state. see figures 2-15, 2-17 and 2-32 through 2-36, for more information. 3.3 mcp6548 chip select (cs ) the mcp6548 is a single comparator with a chip select (cs ) option. when cs is pulled high, the total current consumption drops to 20 pa (typ). 1 pa (typ) flows through the cs pin, 1 pa (typ) flows through the output pin and 18 pa (typ) flows through the v dd pin, as shown in figure 1-1. when this happens, the comparator output is put into a high-impedance state. by pulling cs low, the comparator is enabled. if the cs pin is left floating, the comparator will not operate properly. figure 1-1 shows the output voltage and supply current response to a cs pulse. the internal cs circuitry is designed to minimize glitches when cycling the cs pin. this helps conserve power, which is especially important in battery-powered applications. 3.4 externally set hysteresis greater flexibility in selecting hysteresis, or input trip points, is achieved by using external resistors. input offset voltage (v os ) is the center (average) of the (input-referred) low-high and high-low trip points. input hysteresis voltage (v hyst ) is the difference between the same trip points. hysteresis reduces output chattering when one input is slowly moving past the other, thus reducing dynamic supply current. it also helps in systems where it is best not to cycle between states too frequently (e.g., air conditioner thermostatic control). the mcp6546/7/8/9 family has internally-set hysteresis that is small enough to maintain input offset accuracy (<7 mv), and large enough to eliminate output chattering caused by the comparator?s own input noise voltage (200 vp-p). figure 3-2: the mcp6546/7/8/9 comparators? internal hysteresis eliminates output chatter caused by input noise voltage. r in v ss minimum expected v in () ? 2 ma ------------------------------------------------------------------------------ r in maximum expected v in () v dd ? 2 ma --------------------------------------------------------------------------------- - v in r in v out mcp654x -3 -2 -1 0 1 2 3 4 5 6 7 8 9 0 1 00 2 00 3 00 4 00 5 00 6 00 7 00 8 00 9 00 1 00 0 time (100 ms/div) output voltage (v) -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 input voltage (10 mv/div) v out v in ? hysteresis v dd = 5.0v v in + = 2.75v
? 2003 microchip technology inc. ds21714c-page 13 mcp6546/7/8/9 3.4.1 inverting circuit figure 3-3 shows an inverting circuit for a single-supply application using three resistors, besides the pull-up resistor. the resulting hysteresis diagram is shown in figure 3-4. figure 3-3: inverting circuit with hysteresis. figure 3-4: hysteresis diagram for the inverting circuit. in order to determine the trip voltages (v thl and v tlh ) for the circuit shown in figure 3-3, r 2 and r 3 can be simplified to the thevenin equivalent circuit with respect to v dd , as shown in figure 3-5. figure 3-5: thevenin equivalent circuit. where: using this simplified circuit, the trip voltage can be calculated using the following equation: equation figure 2-19 and figure 2-22 can be used to determine typical values for v ol . this voltage is dependent on the output current i ol as shown in figure 3-3. this current can be determined using the equation below: equation v oh can be calculated using the equation below: equation as explained in section 3.1, ?comparator inputs?, it is important to keep the non-inverting input below v dd +0.3v when v pu > v dd . 3.5 supply bypass with this family of comparators, the power supply pin (v dd for single supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good edge rate performance. 3.6 capacitive loads reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see figure 2-27). the supply current increases with increasing toggle frequency (figure 2-30), especially with higher capacitive loads. v in v out mcp654x v dd r 2 r f r 3 v pu r pu v dd i ol i rf i pu v out high-to-low low-to-high v oh v ol v ss v ss v dd v tlh v thl v in v pu v tlh = trip voltage from low to high v thl = trip voltage from high to low v 23 v out mcp654x v pu r 23 r f + - r pu r 23 r 2 r 3 r 2 r 3 + ------------------ = v 23 r 3 r 2 r 3 + ------------------ v dd = v thl v pu r 23 r 23 r f r pu ++ ---------------------------------------- ?? ?? ?? v 23 r f r pu + r 23 r f r pu ++ --------------------------------------- ?? ?? + = v tlh v ol r 23 r 23 r f + ---------------------- - ?? ?? ?? v 23 r f r 23 r f + --------------------- - ?? ?? + = v tlh = trip voltage from low to high v thl = trip voltage from high to low i ol i pu i rf + = i ol v pu v ol ? r pu -------------------------- ?? ?? v 23 v ol ? r 23 r f + ------------------------ ?? ?? + = v oh v pu v 23 ? () r 23 r f + r 23 r f r pu ++ -------------------------------------- ?? ?? =
mcp6546/7/8/9 ds21714c-page 14 ? 2003 microchip technology inc. 3.7 battery life in order to maximize battery life in portable applications, use large resistors and small capacitive loads. also, avoid toggling the output more than necessary and do not use chip select (cs ) to conserve power for short periods of time. capacitive loads will draw additional power at start-up. 3.8 pcb surface leakage in applications where low input bias current is critical, pcb (printed circuit board) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low-humidity conditions, a typical resistance between nearby traces is 10 12 ? . a 5v difference would cause 5 pa. if current-to-flow, this is greater than the mcp6546/7/8/9 family?s bias current at 25c (1 pa, typ). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 3-6. figure 3-6: example guard ring layout for inverting circuit. 1. inverting configuration (figures 3-3 and 3-6): a. connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the comparator (e.g., v dd /2 or ground). b. connect the inverting pin (v in ?) to the input pad without touching the guard ring. 3.9 typical applications 3.9.1 precise comparator some applications require higher dc precision. an easy way to solve this problem is to use an amplifier (such as the mcp6041) to gain-up the input signal before it reaches the comparator. figure 3-7 shows an example of this approach. figure 3-7: precise inverting comparator. 3.9.2 windowed comparator figure 3-8 shows one approach to designing a windowed comparator. the wired-or connection produces a high output (logic 1) when the input voltage is between v rb and v rt (where v rt > v rb ). figure 3-8: windowed comparator. guard ring v ss v in -v in + v ref v dd v dd r 1 r 2 v out v in v ref v pu r pu mcp6546 mcp6041 v rt 1/2 v rb v in v pu r pu v out mcp6547 1/2 mcp6547
? 2003 microchip technology inc. ds21714c-page 15 mcp6546/7/8/9 4.0 packaging information 4.1 package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard marking consists of microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). for marking beyond this, certain price adders apply. please check with your microchip sales office. mcp6546 i/p256 0307 mcp6546 i/sn0307 256 8-lead msop example: xxxxxx ywwnnn 6546i 307256 5-lead sot-23 ( mcp6546 ) example: xxnn ab37 5-lead sc-70 ( mcp6546 ) example: xnn yww a25 307
mcp6546/7/8/9 ds21714c-page 16 ? 2003 microchip technology inc. package marking information (continued) 14-lead pdip (300 mil) ( MCP6549 )example: 14-lead tssop ( MCP6549 ) example : 14-lead soic (150 mil) ( MCP6549 ) example : xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxxxx yywwnnn xxxxxxxx yyww nnn MCP6549 -i/p 0307256 MCP6549i 0307 256 xxxxxxxxxx MCP6549isl 0307256
? 2003 microchip technology inc. ds21714c-page 17 mcp6546/7/8/9 5-lead plastic package (lt) (sc-70) 0.30 0.15 .012 .006 b lead width 0.18 0.10 .007 .004 c lead thickness 0.30 0.10 .012 .004 l foot length 2.20 1.80 .087 .071 d overall length 1.35 1.15 .053 .045 e1 molded package width 2.40 1.80 .094 .071 e overall width 0.10 0.00 .004 .000 a1 standoff 1.00 0.80 .039 .031 a2 molded package thickness 1.10 0.80 .043 .031 a overall height 0.65 (bsc) .026 (bsc) p pitch 5 5 n number of pins max nom min max nom min dimension limits millimeters* inches units exceed .005" (0.127mm) per side. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not notes: jeita (eiaj) standard: sc-70 drawing no. c04-061 *controlling parameter l e1 e c d 1 b p a2 a1 a q1 top of molded pkg to lead shoulder q1 .004 .016 0.10 0.40 n
mcp6546/7/8/9 ds21714c-page 18 ? 2003 microchip technology inc. 5-lead plastic small outline transistor (ot) (sot23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.43 0.35 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0.35 .022 .018 .014 l foot length 3.10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.63 1.50 .069 .064 .059 e1 molded package width 3.00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .003 .000 a1 standoff 1.30 1.10 0.90 .051 .043 .035 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .035 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .038 p pitch 5 5 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 p d b n e e1 l c a2 a a1 p1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: mo-178 drawing no. c04-091 significant characteristic
? 2003 microchip technology inc. ds21714c-page 19 mcp6546/7/8/9 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 8 8 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top a 5 10 15 51015 mold draft angle bottom b 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
mcp6546/7/8/9 ds21714c-page 20 ? 2003 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
? 2003 microchip technology inc. ds21714c-page 21 mcp6546/7/8/9 8-lead plastic micro small outline package (ms) (msop) d a a1 l c (f) a2 e1 e p b n 1 2 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 ref f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .003 .009 .006 .012 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 typ. .033 min p n units .026 bsc nom 8 inches 0.95 ref - - .009 .016 0.08 0.22 0 0.23 0.40 8 millimeters* 0.65 bsc 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 8 -- - 15 5 - 15 5 - jedec equivalent: mo-187 0 - 8 5 5 - - 15 15 - - - -
mcp6546/7/8/9 ds21714c-page 22 ? 2003 microchip technology inc. 14-lead plastic dual in-line (p) ? 300 mil (pdip ) e1 n d 1 2 eb e c a a1 b b1 l a2 p units inches* millimeters dimension limits min nom max min nom max number of pins n 14 14 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .740 .750 .760 18.80 19.05 19.30 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 5 10 15 5 10 15 5 10 15 5 10 15 mold draft angle bottom * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-001 drawing no. c04-005 significant characteristic
? 2003 microchip technology inc. ds21714c-page 23 mcp6546/7/8/9 14-lead plastic small outline (sl) ? narrow, 150 mil (soic) foot angle 0 4 8 048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 1.27 0.84 0.41 .050 .033 .016 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 8.81 8.69 8.56 .347 .342 .337 d overall length 3.99 3.90 3.81 .157 .154 .150 e1 molded package width 6.20 5.99 5.79 .244 .236 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d p n b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-065 significant characteristic
mcp6546/7/8/9 ds21714c-page 24 ? 2003 microchip technology inc. 14-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 8 4 0 8 4 0 foot angle 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b1 lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 5.10 5.00 4.90 .201 .197 .193 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters* inches units l c 2 1 d n b p e1 e a2 a1 a * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-087 significant characteristic
? 2003 microchip technology inc. ds21714c-page 25 mcp6546/7/8/9 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . sales and support device: mcp6546: single comparator mcp6546t: single comparator (tape and reel) (sc-70, sot-23, soic, msop) mcp6546rt: single comparator (rotated - tape and reel) (sot-23 only) mcp6547: dual comparator mcp6547t: dual comparator (tape and reel for soic and msop) mcp6548: single comparator with cs mcp6548t: single comparator with cs (tape and reel for soic and msop) MCP6549: quad comparator MCP6549t: quad comparator (tape and reel for soic and tssop) temperature range: i = -40c to +85c package: lt = plastic package (sc-70), 5-lead ot = plastic small outline transistor (sot-23), 5-lead ms = plastic msop, 8-lead p = plastic dip (300 mil body), 8-lead, 14-lead sn = plastic soic (150 mil body), 8-lead sl = plastic soic (150 mil body), 14-lead (MCP6549) st = plastic tssop (4.4mm body), 14-lead (MCP6549) part no. -x /xx package temperature range device examples: a) mcp6546t-i/lt: tape and reel, industrial temperature, 5ld sc-70. b) mcp6546t-i/ot: tape and reel, industrial temperature, 5ld sot-23. c) mcp6546-i/p: industrial temperature, 8ld pdip. d) mcp6546rt-i/ot: tape and reel, industrial temperature, 5ld sot23. a) mcp6547-i/ms: industrial temperature, 8ld msop. b) mcp6547t-i/ms: tape and reel, industrial temperature, 8ld msop. c) mcp6547-i/p: industrial temperature, 8ld pdip. a) mcp6548-i/sn: industrial temperature, 8ld soic. b) mcp6548t-i/sn: tape and reel, industrial temperature, 8ld soic. c) mcp6548-i/p: industrial temperature, 8ld pdip. a) MCP6549t-i/sl: tape and reel, industrial temperature, 14ld soic. b) MCP6549t-i/sl: tape and reel, industrial temperature, 14ld soic. c) MCP6549-i/p: industrial temperature, 14ld pdip. data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
mcp6546/7/8/9 ds21714c-page 26 ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21714c-page 27 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate and powersmart are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, powercal, powerinfo, powermate, powertool, rflab, rfpic, select mode, smartsensor, smartshunt, smarttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2003, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification contained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
ds21714c-page 28 ? 2003 microchip technology inc. m americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com atlanta 3780 mansell road, suite 130 alpharetta, ga 30022 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, in 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 phoenix 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-4338 san jose 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu rm. 2401-2402, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - hong kong sar unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen rm. 1812, 18/f, building a, united plaza no. 5022 binhe road, futian district shenzhen 518033, china tel: 86-755-82901380 fax: 86-755-8295-1393 china - shunde room 401, hongjian building no. 2 fengxiangnan road, ronggui town shunde city, guangdong 528303, china tel: 86-765-8395507 fax: 86-765-8395571 china - qingdao rm. b505a, fullhope plaza, no. 12 hong kong central rd. qingdao 266071, china tel: 86-532-5027355 fax: 86-532-5027205 india divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 singapore 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 taiwan kaohsiung branch 30f - 1 no. 8 min chuan 2nd road kaohsiung 806, taiwan tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe austria durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45-4420-9895 fax: 45-4420-9910 france parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany steinheilstrasse 10 d-85737 ismaning, germany tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy via quasimodo, 12 20025 legnano (mi) milan, italy tel: 39-0331-742611 fax: 39-0331-466781 netherlands p. a. de biesbosch 14 nl-5152 sc drunen, netherlands tel: 31-416-690399 fax: 31-416-690340 united kingdom 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44-118-921-5869 fax: 44-118-921-5820 07/28/03 w orldwide s ales and s ervice

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